The classical Forth dual stack model is integral to FISH.
There is a data, or parameter, stack that is used to pass arguments to subroutines, return values from subroutines, and hold temporary results during the execution of subroutines. This stack is implemented in on-chip RAM with the top two stack elements cached in special registers, and a stack pointer that points to the [virtual] top-of-stack element.
An adder is provided to compute offsets from the stack pointer to permit a hardware implementation of the Forth word pick.
Another register is provided, depth, wich parallels the Forth word of the same name. This register is used to establish the bottom of the stack: when /tt depth is zero, there are no items on the stack. The depth register has the same width, in bits, as the stack pointer, sp. This width is the base two logarithm of the number of slots in the parameter stack RAM. The depth register is incremented and decremented in sync with the stack pointer. If depth overflows when it is incremented, this means that the stack RAM has overflowed, and will generate an interrupt. If depth underflows, it means that the parameter stack has underflowed, and this will also generate an interrupt.
The return stack is analogous to the parameter stack, except only the top element is cached in a register. It has a height register that is analogous to the depth register of the parameter stack. The return stack does not need the hardware ablilty to compute offsets from the return stack pointer, rp, so no adder is needed.
Because both stacks exist as independent memories, they may operate in parallel, permitting the pushing and popping of subroutine return addresses concurrently with the pushing, popping, and combining of parameter stack items.